Low-Power Design Environment for MOSIS
نویسندگان
چکیده
The release of a CMOS low power library by the Infopad group at UC Berkeley gave engineers the ability to develop low power circuits with standard cells in Magic with minimum geometry layouts [1]. We describe a process that translates this low power standard cell library from Magic into the Mentor Graphics (MGC) environment. Using the Design Kit Example (DKE), we describe the steps to build a cohesive library structure that allows low power ASIC design; schematic capture with Design Architect (DA) or synthesis with Autologic II, digital simulation with Quicksim II, and standard cell layout in IC station.
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